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STP40NS15
N-CHANNEL 150V - 0.042 - 40A TO-220 MESH OVERLAYTM MOSFET
PRELIMINARY DATA TYPE STP40NS15
s s s s
VDSS 150 V
RDS(on) <0.052
ID 40A
TYPICAL RDS(on) = 0.042 EXTREMELY HIGH dv/dt CAPABILITY VERY LOW INTRINSIC CAPACITANCES GATE CHARGE MINIMIZED
3 1 2
DESCRIPTION This powermos MOSFET is designed using the company's consolidated strip layout-based MESH OVERLAYTM process. This technology matches and improves the performances compared with standard parts from various sources.
TO-220
INTERNAL SCHEMATIC DIAGRAM APPLICATIONS s HIGH CURRENT SWITCHING s UNINTERRUPTIBLE POWER SUPPLY (UPS) s PRIMARYSWITCH IN ISOLATED DC-DC CONVERTERS
ABSOLUTE MAXIMUM RATINGS
Symbol VDS VDGR VGS ID ID IDM (q) PTOT dv/dt Tstg Parameter Drain-source Voltage (VGS = 0) Drain-gate Voltage (RGS = 20 k) Gate- source Voltage Drain Current (continuos) at TC = 25C Drain Current (continuos) at TC = 100C Drain Current (pulsed) Total Dissipation at TC = 25C Derating Factor Peak Diode Recovery voltage slope Storage Temperature Value 150 150 20 40 25 160 140 0.933 9 -65 to 175 175 Unit V V V A A A W W/C V/ns C C
Tj Max. Operating Junction Temperature www..com
(*)Pulse width limited by safe operating area
October 2000
This is preliminary information on a new product now in development or undergoing evaluation. Details are subject to change without notice.
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STP40NS15
THERMAL DATA
Rthj-case Rthj-amb Rthc-sink Tl Thermal Resistance Junction-case Max Thermal Resistance Junction-ambient Max Thermal Resistance Case-sink Typ Maximum Lead Temperature For Soldering Purpose 1.07 62.5 0.5 300 C/W C/W C/W C
AVALANCHE CHARACTERISTICS
Symbol IAR EAS Parameter Avalanche Current, Repetitive or Not-Repetitive (pulse width limited by Tj max) Single Pulse Avalanche Energy (starting Tj = 25 C, ID = IAR, VDD = 50 V) Max Value 40 500 Unit A mJ
ELECTRICAL CHARACTERISTICS (TCASE = 25 C UNLESS OTHERWISE SPECIFIED) OFF
Symbol V(BR)DSS IDSS IGSS Parameter Drain-source Breakdown Voltage Zero Gate Voltage Drain Current (VGS = 0) Gate-body Leakage Current (VDS = 0) Test Conditions ID = 250 A, VGS = 0 VDS = Max Rating VDS = Max Rating, TC = 125 C VGS = 20V Min. 150 1 10 100 Typ. Max. Unit V A A nA
ON (1)
Symbol VGS(th) RDS(on) ID(on) Parameter Gate Threshold Voltage Static Drain-source On Resistance On State Drain Current Test Conditions VDS = VGS, ID = 250A VGS = 10V, ID = 40 A VDS > ID(on) x RDS(on)max, VGS = 10V 40 Min. 2 Typ. 3 0.044 Max. 4 0.052 Unit V A
DYNAMIC
Symbol gfs (1) Ciss Coss Crss Parameter Forward Transconductance Input Capacitance Output Capacitance Reverse Transfer Capacitance Test Conditions VDS > ID(on) x RDS(on)max, ID = 20A VDS = 25V, f = 1 MHz, VGS = 0 Min. Typ. 20 2400 380 160 Max. Unit S pF pF pF
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ELECTRICAL CHARACTERISTICS (CONTINUED) SWITCHING ON
Symbol td(on) tr Qg Qgs Qgd Parameter Turn-on Delay Time Rise Time Total Gate Charge Gate-Source Charge Gate-Drain Charge Test Conditions VDD = 75V, ID = 20A RG = 4.7, VGS = 10V (see test circuit, Figure 3) VDD = 120V, ID = 40A, VGS = 10V Min. Typ. 25 45 100 17 47 110 Max. Unit ns ns nC nC nC
SWITCHING OFF
Symbol td(off) Tf tr(Voff) Parameter Turn-off Delay Time Fall Time Off-voltage Rise Time Test Conditions VDD = 75V, ID = 20A RG = 4.7, VGS = 10V (see test circuit, Figure 3) Vclamp = 120V, ID = 20 A, RG = 4.7, VGS = 10V (see test circuit, Figure 5) Min. Typ. 85 Max. Unit ns
47
ns
tf tc
Fall Time Cross-over Time
35 70
ns ns
SOURCE DRAIN DIODE
Symbol ISD ISDM (2) VSD (1) trr Parameter Source-drain Current Source-drain Current (pulsed) Forward On Voltage Reverse Recovery Time ISD = 40A, VGS = 0 ISD = 40A, di/dt = 100A/s, VDD = 50V, Tj = 150C (see test circuit, Figure 5) 270 Test Conditions Min. Typ. Max. 40 160 1.5 Unit A A V ns
Qrr IRRM
Reverse Recovery Charge Reverse Recovery Current
200 1.5
nC A
Note: 1. Pulsed: Pulse duration = 300 s, duty cycle 1.5 %. 2. Pulse width limited by safe operating area.
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STP40NS15
Fig. 1: Unclamped Inductive Load Test Circuit Fig. 2: Unclamped Inductive Waveform
Fig. 3: Switching Times Test Circuit For Resistive Load
Fig. 4: Gate Charge test Circuit
Fig. 5: Test Circuit For Inductive Load Switching And Diode Recovery Times
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STP40NS15
TO-220 MECHANICAL DATA
DIM. MIN. A C D D1 E F F1 F2 G G1 H2 L2 L4 L5 L6 L7 L9 DIA. 13.0 2.65 15.25 6.2 3.5 3.75 0.49 0.61 1.14 1.14 4.95 2.4 10.0 16.4 14.0 2.95 15.75 6.6 3.93 3.85 0.511 0.104 0.600 0.244 0.137 0.147 4.40 1.23 2.40 1.27 0.70 0.88 1.70 1.70 5.15 2.7 10.40 0.019 0.024 0.044 0.044 0.194 0.094 0.393 0.645 0.551 0.116 0.620 0.260 0.154 0.151 mm TYP. MAX. 4.60 1.32 2.72 MIN. 0.173 0.048 0.094 0.050 0.027 0.034 0.067 0.067 0.203 0.106 0.409 inch TYP. MAX. 0.181 0.051 0.107
A
C
D1
L2
D
F1
G1
E
Dia. L5 L7 L6 L4
P011C
L9
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F2
F
G
H2
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Information furnished is believed to be accurate and reliable. However, STMicroelectronics assumes no responsibility for the consequences of use of such information nor for any infringement of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of STMicroelectronics. Specification mentioned in this publication are subject to change without notice. This publication supersedes and replaces all information previously supplied. STMicroelectronics products are not authorized for use as critical components in life support devices or systems without express written approval of STMicroelectronics. The ST logo is a trademark of STMicroelectronics (c) 2000 STMicroelectronics - Printed in Italy - All Rights Reserved STMicroelectronics GROUP OF COMPANIES Australia - Brazil - China - Finland - France - Germany - Hong Kong - India - Italy - Japan - Malaysia - Malta - Morocco Singapore - Spain - Sweden - Switzerland - United Kingdom - U.S.A. http://www.st.com
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